11. A 4-line-to-1-line multiplexer shown in figure-I (the same as per IEEE convention is shown in figure-II) is fed with three logic inputs A, B and C as shown. The output of the multiplexer will be
12. The number FF in hexadecimal system has equivalence in decimal system to
13. Negative NOR (a NOR in the negative positive logic system) becomes a Positive
14. Which of the following counter can be used to divide the clock frequency of a microprocessor by 5?
15. The Boolean equation $${\text{X}} = \left[ {\left( {{\text{A}} + \overline {\text{B}} } \right)\left( {{\text{B}} + {\text{C}}} \right)} \right]{\text{B}}$$ can be simplified to
16. The output equivalent circuit of following circuit is
17. The Boolean functions can be expressed in canonical SOP (sum of products) and POS (Product of sums) form. For the function, $${\text{Y}} = {\text{A}} + \overline {\text{B}} {\text{C,}}$$ which are such two forms
18. The sum (S) of A and B in a half Adder can be implemented by using K NAND gates. The value of K is
19. A mealy state machine's output depends on
20. The outputs Q and $$\overline {\text{Q}} $$ of master slave S-R flip-flop are connected to its R and S inputs respectively. The output Q when clock pulses are applied will be
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