Digital Electronics MCQ Questions & Answers

Section 1 Section 2 Section 3 Section 4

41.
Which of the following output configurations are available in a TTL gate?
1. Open collector output
2. Totem-pole output
3. Tristate output
Select the correct answer from the options given below:

A. 1 only

B. 1 and 2 only

C. 2 and 3 only

D. 1, 2 and 3

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42.
Logic function $${\text{A}}\overline {\text{B}} {\text{D}} + {\text{A}}\overline {\text{B}} \overline {\text{D}} $$ can be reduced to:

A. $$\overline {\text{A}} \overline {\text{B}} $$

B. $${\text{A}}\overline {\text{B}} $$

C. $$\overline {\text{B}} \overline {\text{D}} $$

D. $${\text{A}}\overline {\text{D}} $$

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43.
Which of the following statement is true for programmable logic array (PLA)?

A. Fixed AND array and fused programmable OR array

B. Fused programmable AND array and fixed OR array

C. Fused programmable AND array and fused programmable OR array

D. None of these

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44.
Time taken to enter a byte in parallel shift register using clock of 5 MHz is . . . . . . . .

A. 0.2 micro seconds

B. 5 micro seconds

C. 40 micro seconds

D. 1.8 micro seconds

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45.
The A/D converter used in a digital voltmeter could be
1. successive approximation type
2. Flash converter type
3. Dual slope converter type.
The correct sequence in the increasing order of their conversion times is

A. 1, 2, 3

B. 2, 1, 3

C. 3, 2, 1

D. 3, 1, 2

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46.
The output is "1" for like inputs and "0" for unlike inputs. This statement is representative of which logic gate?

A. AND

B. OR

C. EX-NOR

D. NAND

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47.
Which logic gate is a basic comparator?

A. NOR

B. NAND

C. EX-NOR

D. AND

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48.
Reduce the Boolean equation $${\text{AB}} + {\text{ABC}} + \overline {\text{A}} {\text{B}} + {\text{A}}\overline {\text{B}} {\text{C}}$$

A. A + BC

B. B

C. B + AC

D. AC

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49.
Match List-I with List-II and select, the correct answer using the options given below the lists:

List-I (Digital Circuit) List-II (Circuit Type)

a. BCD to 7-segment 1. Sequential circuit Decoder

b. 4-to-1 Multiplexer 2. Combinational circuit

c. 4 bit Shift Register 3. Neither sequential nor combinational

d. BCD Counter

A. a-2, b-1, c-2, d-1

B. a-3, b-2, c-1, d-3

C. a-2, b-2, c-1, d-1

D. a-3, b-1, c-2, d-3

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50.
The initial state of MOD-12 down counter is 0110. After 28 clock pulses, the state of the counter will be-

A. 1011

B. 1010

C. 0010

D. 0001

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1 2 3 4 5 6 7 8 9 10

List-I (Digital Circuit)	List-II (Circuit Type)
a. BCD to 7-segment	1. Sequential circuit Decoder
b. 4-to-1 Multiplexer	2. Combinational circuit
c. 4 bit Shift Register	3. Neither sequential nor combinational
d. BCD Counter

Digital Electronics MCQ Questions & Answers | ECE

41. Which of the following output configurations are available in a TTL gate? 1. Open collector output 2. Totem-pole output 3. Tristate output Select the correct answer from the options given below:

Answer & Solution

42. Logic function $${\text{A}}\overline {\text{B}} {\text{D}} + {\text{A}}\overline {\text{B}} \overline {\text{D}} $$ can be reduced to:

Answer & Solution

43. Which of the following statement is true for programmable logic array (PLA)?

Answer & Solution

44. Time taken to enter a byte in parallel shift register using clock of 5 MHz is . . . . . . . .

Answer & Solution

45. The A/D converter used in a digital voltmeter could be 1. successive approximation type 2. Flash converter type 3. Dual slope converter type. The correct sequence in the increasing order of their conversion times is

Answer & Solution

46. The output is "1" for like inputs and "0" for unlike inputs. This statement is representative of which logic gate?

Answer & Solution

47. Which logic gate is a basic comparator?

Answer & Solution

48. Reduce the Boolean equation $${\text{AB}} + {\text{ABC}} + \overline {\text{A}} {\text{B}} + {\text{A}}\overline {\text{B}} {\text{C}}$$

Answer & Solution

Answer & Solution

50. The initial state of MOD-12 down counter is 0110. After 28 clock pulses, the state of the counter will be-

Answer & Solution

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41.
Which of the following output configurations are available in a TTL gate?
1. Open collector output
2. Totem-pole output
3. Tristate output
Select the correct answer from the options given below:

42.
Logic function $${\text{A}}\overline {\text{B}} {\text{D}} + {\text{A}}\overline {\text{B}} \overline {\text{D}} $$ can be reduced to:

43.
Which of the following statement is true for programmable logic array (PLA)?

44.
Time taken to enter a byte in parallel shift register using clock of 5 MHz is . . . . . . . .

45.
The A/D converter used in a digital voltmeter could be
1. successive approximation type
2. Flash converter type
3. Dual slope converter type.
The correct sequence in the increasing order of their conversion times is

46.
The output is "1" for like inputs and "0" for unlike inputs. This statement is representative of which logic gate?

47.
Which logic gate is a basic comparator?

48.
Reduce the Boolean equation $${\text{AB}} + {\text{ABC}} + \overline {\text{A}} {\text{B}} + {\text{A}}\overline {\text{B}} {\text{C}}$$

50.
The initial state of MOD-12 down counter is 0110. After 28 clock pulses, the state of the counter will be-