61. The 2's complement representation of (-541)10 decimal in hexadecimal is:
62. The number of flip-flop required to construct an 8-bit shift register will be
63. Which of the following gates is also called 'all or nothing gate'?
64. In TTL family, the Totem-pole circuit on the output is used to provide . . . . . . . .
65. The expression X + $$\overline {\text{X}} $$ ⋅ Y is equal to
66. The maximum positive and negative numbers which can be represented in 2's complement form using n-bit are
67. The resolution of an-n-bit D/A converter with a maximum input of 5 V is 5 mV. The value of 'n' is
68. In a decoder, if the input lines are 4 then number of maximum output lines will be:
69. The disadvantage of an open shift register is that
70. What is the minimized logic expression corresponding to the given Karnaugh Map?

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