81. Consider the following gate network

Which one of the following gates is redundant?

Which one of the following gates is redundant?
82. The logic circuit realized by the circuit shown in the given figure will be

83. If (0.100)2 = (x)10, then x is
84. If the input to a T flip-flop is a 100 MHz signal, the final output of three T flip-flop in a cascadeis:
85. In a JK flip-flop, J is connected to $$\overline {\text{Q}} $$ and K is connected to Q outputs. The JK flip-flop converts into a
86. A semiconductor RAM has a 12-bit address register and an 8-bit data register. The total number of bits in the memory is
87. The canonical SOP form of given expression f = A + AB + ABC is
88. Maximum value of signal to noise ratio of an 8 bit ADC with an I/P range of 10 V will be
89. In the below circuit, X is given by

90. A 0-10 volt analog to digital converter requires to have a resolution of 0.025%. The rms value of quantization error will be
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