21. TRAP is . . . . . . . . whereas RST7.5, RST6.5, RST5.5 are
22. Hand held programmers are used for programming
23. Each machine cycle of 8051 corresponds to
24. In order to enable RST 5.5, RST 6.5 and RST 7.5 interrupts. Which of the following instructions are needed?
25. In a multi-processor configuration, two coprocessors are connected to the host 8086 processor. The two co-processor instruction sets
26. Consider the following instruction:
EI
MVI A, 08H
SIM
It means
EI
MVI A, 08H
SIM
It means
27. The pipelined architecture of the 8086 allows the fetch & execute cycles to . . . . . . . . instructions/clock cycle
28. An I/O processor controls the flow of information between
29. Which of the following are included in the architecture of a computer?
1. Addressing modes, CPU
2. Instruction modes, data formats
3. Secondary memory, operating system
Select the correct answer from the options given below:
1. Addressing modes, CPU
2. Instruction modes, data formats
3. Secondary memory, operating system
Select the correct answer from the options given below:
30. What is the maximum internal clock frequency of 8086 microprocessor?
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