31. Which one of the following is NOT a vectored interrupt?
32. Consider the following statements regarding programmable interrupt controller 8259A:
1. 8259A is specifically designed for use with the interrupt signals (INTR/INT) of 8085 microprocessor.
2. It can solve eight levels of interrupt priorities in a variety of modes.
3. With additional 8259A devices, the priority scheme can be expanded to 32 levels.
Which of the above statement is/are not correct?
1. 8259A is specifically designed for use with the interrupt signals (INTR/INT) of 8085 microprocessor.
2. It can solve eight levels of interrupt priorities in a variety of modes.
3. With additional 8259A devices, the priority scheme can be expanded to 32 levels.
Which of the above statement is/are not correct?
33. Which one of the following addressing modes is used to compute the address of the operand by adding a constant value to the content of a register?
34. For 8085 microprocessor, the instruction RST 6 restarts subroutine at address:
35. In 8085 microprocessor system, the direct addressing instructions is
36. PUSH a
PUSH b
PUSH c
POP AX
POP BX
SUB AX, BX
POP BX
ADD AX, BX
The expression computed by the above program and stored in AX is
PUSH b
PUSH c
POP AX
POP BX
SUB AX, BX
POP BX
ADD AX, BX
The expression computed by the above program and stored in AX is
37. In IC 8085 Microprocessor TRAP interrupt ISR is at which memory address?
38. The output data lines of microprocessor and memories are usually tristated, because:
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