61. The advantage of cycle stealing in DMA is that
1. It increases the maximum I/O transfer rate.
2. It reduces the interference by the DMA controller in the CPU's memory access.
3. It is beneficially employed for I/O device with shorter bursts of data transfer.
Which of the above statements are correct?
1. It increases the maximum I/O transfer rate.
2. It reduces the interference by the DMA controller in the CPU's memory access.
3. It is beneficially employed for I/O device with shorter bursts of data transfer.
Which of the above statements are correct?
62. The assembler directive in 8086 called EQU
63. During direct memory access (DMA), the INTR and INTA (interrupt and interrupt acknowledge) lines:
64. In 8085 which of following has highest priority?
65. Which of the following computation will take minimum number of clock cycles, if it is implemented on 8051 micro-controller? Following is variable declaration in c code:
Unsigned int a, b;
Unsigned int a, b;
66. When the 8051 is reset and the line is HIGH, the program counter points to the first program instruction in the
67. On receiving an interrupt from an I/O device, the CPU
68. In 8086 instruction set, the instructions to adjust the product to unpacked BCD digits during multiplication/division are
69. For accurate clock period in 8085 it is preferable to use
70. If $${\text{CS}} = {\overline {\text{A}} _{15}}{{\text{A}}_{14}}{{\text{A}}_{13}}$$ is used as the chip select logic of a 4K RAM in an 8085 system, then its memory range will be
Read More Section(Microprocessors and Microcontrollers)
Each Section contains maximum 100 MCQs question on Microprocessors and Microcontrollers. To get more questions visit other sections.