71. What is the content of accumulator (8085) after execution of the following program
MVI A, FF H
ADI 01 H
MVI A, FF H
ADI 01 H
72. The content of which of the following determines the state of the CPU at the end of the execute cycle (when the interrupt is recognized)?
1. Program counter
2. Processor register
3. Certain status conditions
Select the correct answer using the options given below:
1. Program counter
2. Processor register
3. Certain status conditions
Select the correct answer using the options given below:
73. In an 8085 microprocessor using three byte instruction, the lower order address byte is placed in the memory first followed by the
higher order address byte. This is because of the design of
74. A 32 KB RAM is interfaced to 8085 microprocessor starting from 20FFH. The ending address would be
75. MOV AL, OFAH is an example of
76. In 8086, if the content of the code segment register is 1 FAB and the content of the IP register is 10A1, then the effective memory address is
77. Which instruction in an 8085 processor can set a flag?
78. Microprocessor 8085 is the enhanced version of the following with essentially the same construction set
79. Consider the following instructions of 8085 microprocessor
1. MOV B, C
2. STA address
3. ORI byte
The correct sequence in the decreasing order of their respective memory space requirement is
1. MOV B, C
2. STA address
3. ORI byte
The correct sequence in the decreasing order of their respective memory space requirement is
80. In 8053/8054 timer, how many independent counters are available?
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