Electronics MCQs Question and Answer in Engineering Physics Page-4 section-1

31.
A ripple counter designed with J-K flip-flops provided with CLEAR (Cl.) input is shown in the figure. In order that this circuit functions as a MOD-12 counter, the NAND gate inputs (X₁ and X₂) should be

A. A and C

B. A and D

C. B and D

D. C and D

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32.
Figure shows a practical integrator with R_s = 30 M$$\Omega $$, R_F = 20 M$$\Omega $$ and C_F = 0.1 μF. If a step (DC) voltage of +3 V is applied as input for 0 ≤ t ≤ 4 (t is in second), the output voltage is

A. a ramp function of -6 V

B. a step function of -12 V

C. a ramp function of -15 V

D. a ramp function of -4 V

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33.
Under normal operating conditions, the gate terminals of an n-channel Junction Field Effect Transistor UFET) and an n-channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) are

A. both biased with positive potentials

B. both biased with negative potentials

C. biased with positive and negative potentials respectively

D. biased with negative and positive potentials respectively

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34.
The registers Q_D, Q_C, Q_B and Q_A shown in the figure are initially in the state 1010 respectively. An input sequence SI = 0101 is applied. After two clock pulses, the state of the shift registers (in the same sequence Q_D Q_C Q_B Q_A) is

A. 1001

B. 0100

C. 0110

D. 1010

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35.
The output V_o of the ideal op-amp circuit shown in the figure is

A. -7 V

B. -5 V

C. 5 V

D. 7 V

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36.
For the rectifier circuit shown in the figure, the sinusoidal voltage (V₁ or V₂) at the output of the transformer has a maximum value of 10 V. The load resistance R_L, is 1 k$$\Omega $$. If l_av is the average current through the resistor R_L, the circuit corresponds to a

A. full-wave rectifier with l_av = 20/π mA

B. half-wave rectifier with l_av = 20/π mA

C. half-wave rectifier with l_av = 10/π mA

D. full-wave rectifier with l_av = 10/π mA

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37.
Which one of the following is true for a semiconductor p-n junction with no external bias?

A. The total charge in the junction is not conserved

B. The p-side of the junction is positively charged

C. The p-side of the junction is negatively charged

D. No charge develops anywhere in the junction

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38.
The feedback ratio of an amplifier, which on application of a negative feedback, changes the voltage gain from -250 to -100 is

A. -0.250

B. -0.025

C. -0.060

D. -0.006

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39.
When an input voltage V_in, of the form shown, is applied to the circuit given below, the output voltage V_o is of the form

A. Electronics mcq question image

B. Electronics mcq question image

C. Electronics mcq question image

D. Electronics mcq question image

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40.
A half-adder is a digital circuit with

A. three inputs and one output

B. three inputs and two outputs

C. two inputs and one output

D. two inputs and two outputs

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Electronics MCQs Question and Answer in Engineering Physics

31. A ripple counter designed with J-K flip-flops provided with CLEAR (Cl.) input is shown in the figure. In order that this circuit functions as a MOD-12 counter, the NAND gate inputs (X1 and X2) should be

Answer & Solution

32. Figure shows a practical integrator with Rs = 30 M$$\Omega $$, RF = 20 M$$\Omega $$ and CF = 0.1 μF. If a step (DC) voltage of +3 V is applied as input for 0 ≤ t ≤ 4 (t is in second), the output voltage is

Answer & Solution

33. Under normal operating conditions, the gate terminals of an n-channel Junction Field Effect Transistor UFET) and an n-channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) are

Answer & Solution

34. The registers QD, QC, QB and QA shown in the figure are initially in the state 1010 respectively. An input sequence SI = 0101 is applied. After two clock pulses, the state of the shift registers (in the same sequence QD QC QB QA) is

Answer & Solution

35. The output Vo of the ideal op-amp circuit shown in the figure is

Answer & Solution

36. For the rectifier circuit shown in the figure, the sinusoidal voltage (V1 or V2) at the output of the transformer has a maximum value of 10 V. The load resistance RL, is 1 k$$\Omega $$. If lav is the average current through the resistor RL, the circuit corresponds to a

Answer & Solution

37. Which one of the following is true for a semiconductor p-n junction with no external bias?

Answer & Solution

38. The feedback ratio of an amplifier, which on application of a negative feedback, changes the voltage gain from -250 to -100 is

Answer & Solution

39. When an input voltage Vin, of the form shown, is applied to the circuit given below, the output voltage Vo is of the form

Answer & Solution

40. A half-adder is a digital circuit with

Answer & Solution

31.
A ripple counter designed with J-K flip-flops provided with CLEAR (Cl.) input is shown in the figure. In order that this circuit functions as a MOD-12 counter, the NAND gate inputs (X₁ and X₂) should be

32.
Figure shows a practical integrator with R_s = 30 M$$\Omega $$, R_F = 20 M$$\Omega $$ and C_F = 0.1 μF. If a step (DC) voltage of +3 V is applied as input for 0 ≤ t ≤ 4 (t is in second), the output voltage is

33.
Under normal operating conditions, the gate terminals of an n-channel Junction Field Effect Transistor UFET) and an n-channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) are

34.
The registers Q_D, Q_C, Q_B and Q_A shown in the figure are initially in the state 1010 respectively. An input sequence SI = 0101 is applied. After two clock pulses, the state of the shift registers (in the same sequence Q_D Q_C Q_B Q_A) is

35.
The output V_o of the ideal op-amp circuit shown in the figure is

36.
For the rectifier circuit shown in the figure, the sinusoidal voltage (V₁ or V₂) at the output of the transformer has a maximum value of 10 V. The load resistance R_L, is 1 k$$\Omega $$. If l_av is the average current through the resistor R_L, the circuit corresponds to a

37.
Which one of the following is true for a semiconductor p-n junction with no external bias?

38.
The feedback ratio of an amplifier, which on application of a negative feedback, changes the voltage gain from -250 to -100 is

39.
When an input voltage V_in, of the form shown, is applied to the circuit given below, the output voltage V_o is of the form

40.
A half-adder is a digital circuit with