51. In microprocessor's stack, what does the operation push cx means?
52. How many bits are used as conditional flags in the flag register of 8086?
53. If B7 and B6 bits of mode register in 8237 are set to 11, which mode of operation is selected?
54. The address bus of Intel 8085 is 16-bit wide and hence the memory which can be accessed by this address bus is
55. What is the size(in bits) of the stack pointer in 8085?
56. Interrupt latency is the time elapsed between:
57. 1. Program Counter (PC) Pushed to Stack
2. Generate LCALL to ISR
3. Complete Execution of instruction in progress
4. Clear the interrupt flag
5. Set interrupt in progress
Correct order of execution of action taken by 8051 micro-controllers when an interrupt occurs:
2. Generate LCALL to ISR
3. Complete Execution of instruction in progress
4. Clear the interrupt flag
5. Set interrupt in progress
Correct order of execution of action taken by 8051 micro-controllers when an interrupt occurs:
58. Which of the 8086 instruction can be used to fetch a string of 16-bit word stored in memory, automatically incrementing the memory pointer?
59. Which of the following are two most commonly used industry standards for interchip serial communications?
60. Consider the following instruction of 8085 µP.
1. MOV M, A
2. ADD C
3. MVI A, FF
4. CMP M
Which of these cause change in the status of flag(s)?
1. MOV M, A
2. ADD C
3. MVI A, FF
4. CMP M
Which of these cause change in the status of flag(s)?
Read More Section(Microprocessors and Microcontrollers)
Each Section contains maximum 100 MCQs question on Microprocessors and Microcontrollers. To get more questions visit other sections.