We describe a protocol of input device communication below:
i) Each device has a distinct address.
ii) The BUS controller scans each device in a sequence of increasing address value to determine if the entity wishes to communicate
iii) The device ready to communicate leaves its data in the I/O register
iv) The data is picked up and the controller moves to the step a
Identify the form of communication best describes the I/O mode amongst the following.
A. Programmed mode of data transfer
B. DMA
C. Interrupt mode
D. Polling
Answer: Option D
Related Questions on Computer Architecture
Which of the following is not a component of Von Neumann architecture?
A. CPU
B. ALU
C. Memory Unit
D. I/O Interface
What does SIMD stand for in computer architecture?
A. Single Input Multiple Drive
B. Single Input Multiple Data
C. Single Instruction Multiple Drive
D. Single Instruction Multiple Data
Which cache is typically smaller and faster compared to others in a computer system?
A. L2 Cache
B. L3 Cache
C. L1 Cache
D. Virtual Cache
Which register in the CPU stores the address of the next instruction to be fetched?
A. Instruction Register
B. Program Counter
C. Accumulator
D. None of the above

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