11. The disadvantage of the EPROM chip is . . . . . . . .
12. . . . . . . . . is generally used to increase the apparent size of physical memory.
13. The IDE bus is used to connect . . . . . . . .
14. The minimum time delay between two successive memory read operations is . . . . . . . .
15. . . . . . . . . signal enables the processor to wait for the memory operation to complete.
16. The BSY signal signifies . . . . . . . .
17. For the synchronization of the read head, we make use of a . . . . . . . .
18. The main advantage of multiple bus organisation over a single bus is . . . . . . . .
19. The virtual memory bridges the size and speed gap between . . . . . . . . and . . . . . . . .
20. Consider a memory organised into 8K rows, and that it takes 4 cycles to complete a read operation. Then the refresh overhead of the chip is . . . . . . . .
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