81. In multiple Bus organisation, the registers are collectively placed and referred as . . . . . . . .
82. The main purpose of having memory hierarchy is to . . . . . . . .
83. ARM stands for . . . . . . . .
84. The instruction JG loop does . . . . . . . .
85. The instruction -> Add LOCA, R0 does . . . . . . . .
86. In pipelining the task which requires the least time is performed first.
87. The I/O interface required to connect the I/O device to the bus consists of . . . . . . . .
88. The addressing mode which makes use of in-direction pointers is . . . . . . . .
89. The MSYN signal is initiated . . . . . . . .
90. The End signal is generated using, End = T7.ADD + T5.BR + (T5.N+ T4.-N).BRN...
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