In the circuit shown below what is the output voltage (Vout) if a silicon transistor Q and an ideal op-amp are used?

A. -15 V
B. -0.7 V
C. +0.7 V
D. +15 V
Answer: Option B
A. -15 V
B. -0.7 V
C. +0.7 V
D. +15 V
Answer: Option B
The action of JFET in its equivalent circuit can best be represented as a
A. Current controlled Current source
B. Current controlled voltage source
C. Voltage controlled voltage source
D. Voltage controlled current source
In a p+n junction diode under reverse bias, the magnitude of electric field is maximum at
A. The edge of the depletion region on the p-side
B. The edge of the depletion region on the n-side
C. The p+n junction
D. The center of the depletion region on the n-side
To prevent a DC return between source and load, it is necessary to use
A. Resistor between source and load
B. Inductor between source and load
C. Capacitor between source and load
D. Either A or B
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