In the circuit shown, the ports Q1 and Q2 are in the states Q1 = 1, Q2 = 0. The circuit is now subjected to two complete clock pulses. The state of these ports now becomes
A. Q2 = 1, Q1 = 0
B. Q2 = 0, Q1 = 1
C. Q2 = 1, Q1 = 1
D. Q2 = 0, Q1 = 0
Answer: Option C
This Question Belongs to Engineering Physics >> Electronics
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