The message bit sequence to a DPSK modulator is 1, 1, 0, 0, 1, 1. The carrier phase during the reception of the first two message bits is π, π. The carrier phase for the remaining four message bits is
A. π, π, 0, π
B. 0, 0, π, π
C. 0, π, π, π
D. π, π, 0, 0
Answer: Option C
Related Questions on Digital Communication
A. Only 800 Hz component
B. 800 Hz and 900 Hz components
C. 800 Hz and 1000 Hz components
D. 800 Hz, 900 Hz and 100 Hz components
Increased pulse width in the flat top sampling, leads to
A. Attenuation of high frequencies in reproduction
B. Attenuation of low frequencies in reproduction
C. Greater aliasing errors in reproduction.
D. No harmful effects in reproduction
A. 16 Mbps
B. 100 Mbps
C. 600 Mbps
D. 6.4 Gbps
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