FET(Field Effect Transistors) MCQ Questions & Answers

Home

Competitive Exams

Aptitude English Verbal Reasoning Non Verbal Reasoning General Knowledge(GK) General Science(GS) Data Interpretation(DI) Banking Awareness Current Affairs

Computer & Programming

Computer Fundamentals Networking SQL Database C Programming C++ Programming Java Python

Other Subjects

Commerce Management Law Political Science Psychology Agriculture

Exam Categories

SSC Exams Railway Exams All Exams

SSC Exams

SSC CGL SSC CHSL SSC MTS SSC CPO SSC GD SSC JHT SSC Selection Post SSC Stenographer SSC JE

Railway Exams

RRB ALP RRB Technician RRB Section Controller RRB JE RRB Paramedical RRB Group D

Popular Exams

SSC CGL SSC CHSL SSC MTS RRB Group D RRB ALP RRB Technician RRB Section Controller

Engineering Subjects

Computer Science Electronics & Communication Mechanical Engineering Civil Engineering Electrical Engineering

More Engineering

Chemical Engineering Automobile Engineering Biotechnology Mining Engineering Geological Engineering

Engineering Core

Engineering Mathematics Engineering Physics Engineering Chemistry Metallurgical Engineering

Computer Fundamentals

Computer Fundamentals Networking Database SQL MySQL

Programming

C Programming C++ Programming Java Python PHP JavaScript

Advanced

Artificial Intelligence Machine Learning Data Science Cloud Computing Hadoop IoT

Graduation & PG

Commerce Management Law Mass Communication Political Science Psychology

Resources

Current Affairs Interview Blog

Learn FET(Field Effect Transistors) MCQ questions & answers are available for a Electrical Engineering students to clear GATE exams, various technical interview, competitive examination, and another entrance exam. FET(Field Effect Transistors) MCQ question is the important chapter for a Electrical Engineering and GATE students. Page-4 section-1

The two important advantages of a JFET are ___________

A) high input impedance and square-law property B) inexpensive and high output impedance C) low input impedance and high output impedance D) none of the above

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

In a JFET, IDSS is known as ___________

A) drain to source current B) drain to source current with gate shorted C) drain to source current with gate open D) none of the above

Discuss

Answer & Solution

Answer: Option B

No explanation is given for this question. Let's Discuss on Board

A MOSFET is sometimes called ___________ JFET

A) many gate B) open gate C) insulated gate D) shorted gate

Discuss

Answer & Solution

Answer: Option C

No explanation is given for this question. Let's Discuss on Board

In a common source JFET amplifier, the output voltage is ___________.

A) 180° out of phase with input B) In phase with input C) 90° out of phase with input D) None of the above

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

A CS JFET amplifier has a load resistance of 10 kΩ , R_D = 820 V. If g_m = 5 mS and V_in = 500 mV, the output signal voltage is

A) 2.05 V B) 25 V C) 0.5 V D) 1.89 V

Discuss

Answer & Solution

Answer: Option D

No explanation is given for this question. Let's Discuss on Board

In a FET, there are ___________ pn junctions at the sides

A) three B) four C) five D) two

Discuss

Answer & Solution

Answer: Option D

No explanation is given for this question. Let's Discuss on Board

The input impedance of a MOSFET is of the order of ___________

A) O B) a few hundred O C) kΩ D) several MO

Discuss

Answer & Solution

Answer: Option D

No explanation is given for this question. Let's Discuss on Board

A certain common source JFET has a voltage gain of 10. If the source bypass capacitor is removed, ___________

A) the voltage gain will increase B) the transconductance will increase C) the voltage gain will decrease D) the Q-point will shift

Discuss

Answer & Solution

Answer: Option C

No explanation is given for this question. Let's Discuss on Board

A certain D-MOSFET is biased at VGS = 0 V. Its data sheet specifies IDSS = 20mA and VGS(off) = -5 V. The value of the drain current is ___________

A) 20 mA B) 0 mA C) 40 mA D) 10 mA

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

The gate of a JFET is ___________ biased

A) reverse B) forward C) reverse as well as forward D) none of the above

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

1 2 3 4 5

FET(Field Effect Transistors) MCQ Questions & Answers | Electrical Engineering