65.
Two D-flip-flops, as shown below, are to be connected as a synchronous counter that goes through the following Q1Q0 sequence
00 → 01 → 11 → 10 → 00 → . . . . .
The inputs D0 and D1 respectively should be connected as
Digital Electronics mcq question image

66.
The Boolean expression $$\left( {{\text{X}} + {\text{Y}}} \right)\left( {{\text{X}} + \overline {\text{Y}} } \right) + \overline {\left( {\overline {\text{X}} \overline {\text{Y}} } \right) + \overline {\text{X}} } $$       simplifies to

70.
The figure below shows a multiplexer where S1 and S0 are the select lines. I0 to I3 are the input data lines, EN is the enable line, and F(P, Q, R) is the output. F is
Digital Electronics mcq question image

Read More Section(Digital Electronics)

Each Section contains maximum 100 MCQs question on Digital Electronics. To get more questions visit other sections.