Digital Electronics MCQ Questions & Answers

1

The term AB + AC + BC reduces to

A) AB + CA B) AC + BC C) $${\text{AC}} + {\text{B}}\overline {\text{C}} $$ D) $${\text{AB}} + \overline {\text{B}} \overline {\text{C}} $$

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Answer & Solution

Answer: Option C

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2

A digital-to-analog converter with a full scale output voltage of 3.5 V has a resolution close to 14 mV. Its bit size is

A) 4 B) 8 C) 16 D) 32

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Answer & Solution

Answer: Option B

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3

The logic expression $${\text{y}} = {\text{A}} + \overline {\text{A}} {\text{B}}$$ is equivalent to

A) $${\text{y}} = {\text{AB}}$$ B) $${\text{y}} = \overline {\text{A}} {\text{B}}$$ C) $${\text{y}} = \overline {\text{A}} + {\text{B}}$$ D) $${\text{y}} = {\text{A}} + {\text{B}}$$

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Answer & Solution

Answer: Option D

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4

What value of x satisfies the equation $$\sqrt {{{\left( {121} \right)}_7}} = {\left( x \right)_2}?$$
(where integer numbers written as subscripts are the base of the corresponding number systems.)

A) 1011 B) 0111 C) 1010 D) 1000

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Answer & Solution

Answer: Option D

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5

$$\overline {\text{A}} {\text{B}} + {\text{AB,}}$$ write the simplified expression

A) A B) AB C) B D) $$\overline {\text{A}} {\text{B}}$$

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Answer & Solution

Answer: Option C

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6

The difference between PLA and ROM is

A) PLA is sequential, ROM is combinational B) PLA is combinational ROM is sequential C) PLA is economizes on the number of min-term to implement Boolean functions D) PLA has fixed AND array, ROM has fixes OR array

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Answer & Solution

Answer: Option C

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7

The schematic shown in the figure represents
Digital Electronics mcq question image

A) Divide by seven counter B) Divide by five counter C) Binary coded decimal counter D) Divide by twelve counter

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Answer & Solution

Answer: Option C

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8

If a 4-to-1 MUX (shown below) realizes a three-variable function f(X, Y, Z) = XY + X$$\overline {\text{Z}} $$. Then which of the following is correct?
Digital Electronics mcq question image

A) I₀ = X, I₁ = 0, I₂ = X, I₃ = X B) I₀ = 0, I₁ = 1, I₂ = Y, I₃ = X C) I₀ = X, I₁ = 1, I₂ = 0, I₃ = X D) I₀ = X, I₁ = 0, I₂ = X, I₃ = Z

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Answer & Solution

Answer: Option A

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9

Consider the logic circuit with input signal TEST shown in the figure. All gates in the figure shown have identical non-zero delay. The signal TEST which was at logic LOW is switched to logic HIGH and maintained at logic HIGH. The output:
Digital Electronics mcq question image

A) Stays LOW throughout B) Pulses from LOW to High to LOW C) Stays HIGH throughout D) Pulses from HIGH to LOW to HIGH

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Answer & Solution

Answer: Option D

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10

An R-S latch is

A) combinational circuit B) synchronous sequential circuit C) one bit memory element D) one clock delay element

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Answer & Solution

Answer: Option C

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Digital Electronics MCQ Questions & Answers | ECE