Microprocessors And Microcontrollers MCQ Questions & Answers

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Learn Microprocessors And Microcontrollers MCQ questions & answers are available for a Electronics and Communications Engineering(ECE) students to clear GATE exams, various technical interview, competitive examination, and another entrance exam. Microprocessors And Microcontrollers MCQ question is the important chapter for a Electronics and Communications Engineering(ECE) and GATE students. Page-3 section-2

Each section contains 100 MCQs on Microprocessors and Microcontrollers .

TRAP is . . . . . . . . whereas RST7.5, RST6.5, RST5.5 are

A) Maskable, Non Maskable B) Maskable, Maskable C) Non Maskable, Non Maskable D) Non Maskable, Maskable

Discuss

Answer & Solution

Answer: Option D

No explanation is given for this question. Let's Discuss on Board

Hand held programmers are used for programming

A) small PLCs B) medium PLCs C) large PLCs D) none of these

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

Each machine cycle of 8051 corresponds to

A) 4 clock periods B) 12 clock periods C) 3 clock periods D) 6 clock periods

Discuss

Answer & Solution

Answer: Option B

No explanation is given for this question. Let's Discuss on Board

In order to enable RST 5.5, RST 6.5 and RST 7.5 interrupts. Which of the following instructions are needed?

A) EI only B) SIM only C) EI and SIM only D) None

Discuss

Answer & Solution

Answer: Option C

No explanation is given for this question. Let's Discuss on Board

In a multi-processor configuration, two coprocessors are connected to the host 8086 processor. The two co-processor instruction sets

A) Must be the same B) May overlap C) Must be disjoint D) Must be the same as that of the hoste

Discuss

Answer & Solution

Answer: Option D

No explanation is given for this question. Let's Discuss on Board

Consider the following instruction:
EI
MVI A, 08H
SIM
It means

A) Disable all interrupts B) Enable all interrupts C) Disable RST 7.5 and 6.5 D) Enable RST 7.5 and 6.5

Discuss

Answer & Solution

Answer: Option B

No explanation is given for this question. Let's Discuss on Board

The pipelined architecture of the 8086 allows the fetch & execute cycles to . . . . . . . . instructions/clock cycle

A) 1 : 4 B) 1 : 2 C) 1 : 1 D) 2 : 1

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

An I/O processor controls the flow of information between

A) Cache memory and I/O devices B) Main memory and I/O devices C) Two I/O devices D) Cache and main memories

Discuss

Answer & Solution

Answer: Option B

No explanation is given for this question. Let's Discuss on Board

Which of the following are included in the architecture of a computer?
1. Addressing modes, CPU
2. Instruction modes, data formats
3. Secondary memory, operating system
Select the correct answer from the options given below:

A) 1 and 2 B) 1 and 3 C) 2 and 3 D) 3 only

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

What is the maximum internal clock frequency of 8086 microprocessor?

A) 3 MHz B) 16 MHz C) 5 MHz D) 8 MHz

Discuss

Answer & Solution

Answer: Option C

No explanation is given for this question. Let's Discuss on Board

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Microprocessors And Microcontrollers MCQ Questions & Answers | ECE