Home

Competitive Exams MCQs

Aptitude English Verbal Reasoning Non Verbal Reasoning General Knowledge(GK) General Science(GS) Data Interpretation(DI) Banking Awareness Current Affairs

Subject wise GK MCQs

General Knowledge(GK) State Wise GK History GK Geography GK Physics GK Chemistry GK Biology GK Environmental Science GK

Computer Fundatmental MCQs

Computer Fundamentals Microsoft Word Microsoft Excel MS Power Point Tally Operating System Python AI(Artificial Intelligence)

Engineering Subjects MCQs

Computer Science Electronics & Communication Mechanical Engineering Civil Engineering Electrical Engineering

More Engineering MCQs

Chemical Engineering Automobile Engineering Biotechnology Mining Engineering Geological Engineering Metallurgical Engineering

Engineering Core

Engineering Mathematics Engineering Physics Engineering Chemistry

Computer Fundamentals MCQs

Computer Fundamentals Microsoft Word Microsoft Excel MS Power Point Tally Operating System Networking Database SQL MySQL

Programming MCQs

C Programming C++ Programming Java Python PHP JavaScript

Advanced Programming MCQs

Artificial Intelligence Machine Learning Data Science Cloud Computing Hadoop IoT

Graduation & PG

Commerce Management Law Agriculture Sociology Psychology Home Science Mass Communication Political Science Psychology

Resources

Current Affairs Interview Blog

Exam Categories

SSC Exams Railway Exams All Exams

SSC Exams

SSC CGL SSC CHSL SSC MTS SSC CPO SSC GD SSC JHT SSC Selection Post SSC Stenographer SSC JE

Railway Exams

RRB ALP RRB Technician RRB Section Controller RRB JE RRB Paramedical RRB Group D

Popular Exams

SSC CGL SSC CHSL SSC MTS RRB NTPC (Graduate) RRB Group D RRB ALP RRB Technician RRB Section Controller

This question belongs to Electronics And Communications Engineering Digital Electronics

Digital Electronics

?

In the circuit shown below Q₁ has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If V_cc is +5 V, X and Y are digital signals with 0 V as logic 0 and V_cc as logic 1, the Boolean expression for Z is

A) $${\text{XY}}$$ B) $$\overline {\text{X}} {\text{Y}}$$ C) $${\text{X}}\overline {\text{Y}} $$ D) $$\overline {{\text{XY}}} $$

Answer & Solution

Correct Answer: Option B

Let's discuss the solution. Join the discussion

Question posted by Examveda

Community

Join the Discussion

Join the discussion

Login to post a comment or share your explanation.

No comments yet Be the first to discuss this question.

Keep Learning

Related Questions on Digital Electronics