VLSI Design And Testing MCQ Questions & Answers

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Learn VLSI Design And Testing MCQ questions & answers are available for a Electronics and Communications Engineering(ECE) students to clear GATE exams, various technical interview, competitive examination, and another entrance exam. VLSI Design And Testing MCQ question is the important chapter for a Electronics and Communications Engineering(ECE) and GATE students. Page-3 section-1

Each section contains 100 MCQs on VLSI Design and Testing .

The n-well collector is formed by . . . . . . . . .

A) Lightly doped n-type epitaxial layer on p-Substrate B) Heavily doped n-type epitaxial layer on p-Substrate C) Lightly doped n-type diffused layer on p-Substrate D) Heavily doped n-type diffused layer on p-Substrate

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

The current Ids . . . . . . . . as Vds increases.

A) Increases B) Decreases C) Remains fairly constant D) Exponentially increases

Discuss

Answer & Solution

Answer: Option C

No explanation is given for this question. Let's Discuss on Board

As die size shrinks, the complexity of making the photomasks . . . . . . . .

A) Increases B) Decreases C) Remains the same D) Cannot be determined

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

In BiCMOS, MOS switches are used to . . . . . . . .

A) Drive input loads B) Drive output loads C) To perform logic functions D) To amplify the input voltage

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Answer & Solution

Answer: Option C

No explanation is given for this question. Let's Discuss on Board

Fast gate can be built by keeping . . . . . . . .

A) Low output capacitance B) High on resistance C) High output capacitance D) Input capacitance does not affect speed of the gate

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . . .

A) Drain region B) Channel region C) Switch region D) Bulk region

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Answer & Solution

Answer: Option B

No explanation is given for this question. Let's Discuss on Board

CMOS technology is used in developing which of the following?

A) Microprocessors B) Microcontrollers C) Digital logic circuits D) All of the mentioned

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Answer & Solution

Answer: Option D

No explanation is given for this question. Let's Discuss on Board

What is the condition for non conducting mode?

A) Vds lesser than Vgs B) Vgs lesser than Vds C) Vgs = Vds = 0 D) Vgs = Vds = Vs = 0

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Answer & Solution

Answer: Option D

No explanation is given for this question. Let's Discuss on Board

For depletion mode transistor, gate should be connected to . . . . . . . .

A) Source B) Drain C) Ground D) Positive voltage rail

Discuss

Answer & Solution

Answer: Option A

No explanation is given for this question. Let's Discuss on Board

The MOSFETS are arranged in this configuration to provide . . . . . . . .

A) Zero static power dissipation B) High Input impedance C) Both zero static power dissipation and high input impedance D) None of the mentioned

Discuss

Answer & Solution

Answer: Option C

No explanation is given for this question. Let's Discuss on Board

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VLSI Design And Testing MCQ Questions & Answers | ECE