VLSI Design And Testing MCQ Questions & Answers | ECE

A. Raster scanning

B. Vector scanning

C. Raster & vector scanning

D. None of the mentioned

A. True

B. False

A. p-type substrate of high doping level

B. n-type substrate of low doping level

C. p-type substrate of moderate doping level

D. n-type substrate of high doping level

A. Remove silicon oxide

B. Remove silicon nitride and pad oxide

C. Remove polysilicon gate layer

D. Reduce the size of the layout

A. Insulating layer

B. Conducting layer

C. Lower metal layer

D. p type layer

A. 650 cm²/V sec

B. 260 cm²/V sec

C. 240 cm²/V sec

D. 500 cm²/V sec

A. Source to drain

B. Drain to source

C. Source to ground

D. Source to gate

A. Current source

B. Voltage source

C. Buffer

D. Divider

A. p well

B. n well

C. All of the mentioned

D. None of the mentioned

A. Switches

B. Resistors

C. Buffers

D. Capacitors